Submission Guidelines



All papers must be original and not simultaneously submitted to another journal or conference. Authors are invited to submit PDF files of full-length, original, unpublished manuscripts in IEEE proceedings format (no more than 6 pages). To enable blind review, the author list should be omitted from the main document. All submissions should be in PDF format through the online submission system:

Submit your paper by clicking here

Contributions are sought in, but not limited to, the following areas:

  1. Circuits, Reliability, and Fault-Tolerance (CRT): Analog/mixed-signal circuits design and testing, RF and communication circuits, design for testability and reliability, adaptive circuits, interconnects, static and dynamic defect-and fault-recoverability, and variation-aware design.
  2. Computer-Aided Design and Verification (CAD): Hardware/software co-design, logic and behavioral synthesis, simulation and formal verification, physical design, signal integrity, power and thermal analysis , statistical approaches.
  3. Digital Circuits and FPGA based Designs (DCF): Digital circuits, chaos/neural/fuzzy-logic circuits, high-speed/low-power circuits, energy efficient circuits, near and sub-threshold circuits, memories, FPGA designs, FPGA based systems.
  4. Emerging and Post-CMOS Technologies (EPT): Nanotechnology, molecular electronics, quantum devices, optical computing, spin-based computing, biologically-inspired computing, CNT, SET, RTD, QCA, reversible logic, and CAD tools for emerging technology devices and circuits.
  5. System Design and Security (SDS): Structured and Custom Design methodologies, microprocessors/ micro-architectures for performance and low power, embedded processors, analog/digital/mixed-signal systems, NoC, power and temperature aware designs, Hardware security, Cryptography, watermarking, and IP protection, TRNG and security oriented circuits, PUF circuits.
  6. VLSI for Applied and Future Computing (AFC): Neuromorphic and brain-inspired computing, quantum computing, circuits and architectures for machine learning and artificial intelligence, methodologies for on-chip learning, deep learning acceleration techniques, applications for and use-cases of learning systems, sensor and sensor network, electronics for Internet of Things and smart medical devices.


Organization

General Chair:
Fernanda Kastensmidt, UFRGS, Brazil
Ricardo Reis, UFRGS, Brazil

Program Chairs:
Hai (Helen) Li, Duke University, USA
Aida Todri-Sanial, CNRS-LIRMM, France

Special Session Chairs:
Juergen Becker, KIT, Germany
Saraju Mohanty, University of North Texas, USA

Industry Liaison Chairs:
Victor Grimblatt, Synopsys, Chile
Linnyer Aylon, UEM, Brazil

Publication Chair:
Carolina Metzler, Cadence, Brazil

Student Research Forum Chairs
Guilherme Flach, Synopsys, USA

Publicity Chairs:
Theocharis Theocharides, Univ. Cyprus

Finance Chair:
Paulo Butzen, UFRGS, Brazil
Calebe Conceição, IFSul, Brazil

Registration Chair:
José Azambuja, UFRGS, Brazil

Submission System Chair:
Geancarlo Abich, UFRGS, Brazil

Web Chair:
Gabriel Ribeiro, IFSul, Brazil

 

Steering Committee:
Jürgen Becker (chair)
Saraju Mohanty (vice-chair)
Hai (Helen)Li
Lionel Torres
Michael Hübner
Nikolaos Voros
Ricardo Reis
Sandip Kundu
Sandukta Bhanja
Susmita Sur-Kolay
Theocharis Theocharides
Vijay Narayanan

Contact

Copyright © 2023 ISVLSI.